FIG. 1 is a diagrammatic view of a conventional digital system 100 including a processor 110 and a memory device 115. The processor 110, such as a digital signal processor (DSP), includes a processor memory 111 comprising a plurality of words having a first word width. The memory device 115, such as a dynamic random access memory (DRAM), comprises a plurality of words having a second word width. Data is transferred between the processor memory 111 and the memory device 115 under the control of the processor 110 via a data bus 116. In many digital systems, the processor memory 111 and the memory device 115 have different word widths such that for data to be transferred between the two memories, the data must first be converted from one word width to the other. In the digital system 100 illustrated in the figure, the processor memory 111 has a 24-bit word width while the memory device 115 has a narrower 16-bit word width.
FIG. 2 illustrates the problem of transferring data between the processor memory 111 and the memory device 115 for data in a digital multichannel (e.g., stereo) format. In this example, data is transferred between the processor memory 111 and the memory device 115 in 96-bit blocks. Because the word widths of the processor memory and the memory device are different, a block of data is stored in a first, unpacked format in the processor memory and in a second, packed format in the memory device to conserve space. Therefore, when transferring a block of data between the processor memory 111 and the memory device 115, the data must be converted from the unpacked format to the packed format or vice versa. Unfortunately, in the prior art, this conversion process degrades system performance by increasing the latency and/or decreasing the throughput of the block transfer.
In view of the shortcomings of prior art methods for data transfer, it is an object of the present invention to provide an apparatus and method for transferring data between memories having different word widths that provides a low latency and a high throughput.